P4: Programming Networks Forwarding Plane

P4: Programming Networks Forwarding Plane

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The pace of innovation in networking world is increasing with the immense growth in IoT devices, increasing data traffic, new protocols and private and public clouds. The future of networking has gone beyond that of separating data and control planes for SDN, to programming the forwarding logic deep within the ASIC. Technology is now moving from traditional fixed architecture silicon switch to flexible programmable switches. The new programmable ASIC allows to support custom protocols as well as protocols of today and future. This demands new higher level domain specific language to simplify the writing of forwarding plane. Each ASIC manufacturer has to come up with their own custom language which is more of dependent on the hardware architecture. Porting of forwarding plane logic from one manufacturer of networking ASIC to other will require lot of efforts and is really painful. This generates a need of standard language which is independent of underlying hardware and protocols.

What is P4?

P4 (Programming Protocol-Independent Packet Processors) is an open source domain specific programming language designed specifically for programming reconfigurable networking pipeline. The P4 language is public and developed by the p4.org consortium, which includes various companies in the area of networking, cloud systems, and academic institutions. Initially, P4 was designed for data plane programming of network switches but its scope has been broaden to cover programmable network element such as hardware or software switches, network interface cards, routers or other packet processing systems.

P4 Compiler: How P4 is Target Independent?

From the past few years, it has been clear that packet processed by the data plane in any networking devices can roughly be in three basic stages. 1) Parser block: Responsible for packet identification and extraction, 2) Control block: Responsible for match + action and 3) DeParser: Responsible to form the desired egress packet. Networking Chips are being built this way, and are protocol independent. P4 is that language which can compile for any target device to specify how the packets can be processed in a data plane. Architecture of P4 Compiler helps to make it target independent by separating language and the target model. P4 has frontend open source and backend loose to make it independent of target. Each chip vendor can implement its own compiler backend to map to their hardware architecture. The Architecture of P4 also helps to insulate hardware details by defining their own model and then writing p4 backend to support the same.

Figure 1: P4 Compiler Architecture

Each chip manufacturer just need to have P4 compiler tool chain compatible with their hardware, users can write their own P4 program independent from the vendor’s dependency,  compile and run without compromising speed. The user only needs to focus on actual packet processing logic without worrying on underlying hardware. Compiler will generate runtime code for your hardware. Figure 2 shows the core components provided by P4 for data plane programming.

Figure 2: P4 components

How is P4 beneficial?

  • Open source language for all programmable network device. Easily portable.
  • As P4 program can be written by the user, it helps to retain ownership of new IP. Now it’s no longer needed to share new feature specification with chip vendors or sometimes their customers and hence retain intellectual property protection.
  • P4 makes deployment of new protocol much simpler and consumes less time.
  • Network devices used at different application requires different set of protocols. Using P4, user can implement only required protocols as per their application and remove protocols which are not required for their application. Thus, the available resources can be used effectively.
  • Programming data plane is now using software where you write a program, compile and load on hardware using P4, thus provides benefits like software reuse, data hiding, library creation, separating hardware and software components, easy software upgrade and easy debugging.

Challenges using P4

  • Custom proprietary language have more control over programmable networking hardware as it is designed for that only. P416 do support extern methods to suffice such custom hardware specific requirements but using an extern in P4 makes it less portable.
  • Few of the features like Hash, ECMP, multicast, broadcast, mirroring, queuing, scheduling and Checksum are very much hardware dependent. To address all target using Generic P4 and getting full access to hardware is difficult.
  • Limited means of communication between control plane and data plane in P4. No support for generating the new packets.

P4 has opened up lot of opportunities and changed the way networking chip where designed. P4 architecture gives a sample model and idea to design a fully programmable chip. Moving forward all traditional switches will be soon converted into programmable switches with fully software defined data and control plane.

Looking for P4 support for your device? VOLANSYS provides end-to-end solution for digital networks. It provides P4 support on programmable network device including compiler backend development, P4 programs for different features and complete feature testing. The engineers at VOLANSYS have in depth knowledge and hands on experience working with P4, programmable networking chip, end-to-end testing including feature and performance of networking devices.

About Author: Komal Shah 

Komal is associated with VOLANSYS Technologies as a Senior Engineer with 3+ years of experience in development of Software Development Kit (SDK) for reconfigurable networking switch. She has good hands-on working with programmable Parser, P4 Compiler back-end development and data plane pipeline programming. She is always ready to take up challenges.